The 3rd Party Semiconductor Intellectual Property (SIP) market has seen great innovation in constructing System-on-a-Chip (SoC) designs over the last ten years. Most of these evolutionary forces are driven by the need to integrate more functionality in fewer devices at the system level and in ever-smaller footprints. However, most of SoC team are challenged by design complexity and power/performance goals, and it's more and more difficult for designers to craft their silicon solutions in a timely and cost effective manner.
On purpose to offer cost effective solutions in dealing these challenges, our SoC platform development is oriented by IP Subsystem Concept, where each IP block is organized by system-level functionality (TLM), accompanied by its own verification testbench (OVM) and small to large amount of applications software. This concept makes the SoC designers focus on system-level functionality and user applications before individual IP development. Guided by this concept, ACEN's SoC design process becomes more manageable and shows remarkable reduction in final cost and design cycle time.
The SoC solutions includes following topics :