Analog Mixed Signal Design Solutions
Great part of ASIC/SoC designs contain analog circuitry, and especially it happens in security, consumer, wireless and communication markets. Although the analog portion is a fundamental differentiator of any mixed-signal designs, they frequently introduce schedule delays and yield problems. This fact causes major changes in design method and challenging the conventional EDA flow.
The classical analog design provides very little re-use leverage when the design goes into new process nodes. Under the time-to-market pressure, new IP reuse solution seems demand follower points :
- A new expression handler to captures all design data when IP is reused.
- A new generation db code, implemented in new, complete, open and portable language.
- More interoporability of PDKs to reduce the DB corruption during translation or reuse.
- New FastMOS transistor-level simulator to handle billion gates sign-off simulation.
- New design platform which is well ahead with native OA capabilities (not just emulate).
- Process-portable analog circuit layout and Cell Libraries.
As a IPL Alliance member, our A/MS team adopts the concept of Interoperable PDK, and believes the success of analog products must comes from balance of circuit innovation, device design and process rules. With this in practice, the ACEN A/MS team is enabled to offer new, quick and cost-effective analog/mixed signal solutions to improve IP reuse capability and meets rigorous specs from our customers.
The AMS solution includes follower topics :
- Digital/Analog Spec to GDSII
- Digital/Analog IP core Integration
- Behavioral Model development for AMS design
- A/MS Design && Implementation
- 3rd SIP integration service (Third Part Silicon IP)
- Design Consulting
- Pos-Manufacturing ECO service
- Analog Test Structure Development
- A/MS test service (Partners)